Senior SoC Emulation Engineer
Dubai, United Arab Emirates
Full timeOn-site
Job description
Location: Dubai, United Arab Emirates
Employment: Full-time | On-site
Your Mission
Own the development and bring-up of hardware emulation environments for next- generation AI/HPC SoCs. You'll enable full-system validation, accelerate hardware/software integration, and support early firmware and software development before silicon is available. Working across RTL, verification, and software teams, you'll help identify complex system-level issues early and drive our AI silicon to ward successful tape-out.
Responsibilities
- Own SoC emulation: Build, integrate, and maintain subsystem and full-chip emulation environments using commercial hardware emulation platforms.
- RTL bring-up and optimization: Compile, partition, map, and optimize RTL designs for emulation, resolving compatibility, performance, and integration issues.
- Verification acceleration: Adapt UVM environments, develop BFMs and transactors, and enable hardware-accelerated verification.
- HW/SW co-verification: Enable processor boot, firmware execution, driver development, and software-driven system validation.
- System-level debugging: Investigate complex issues across CPU, NoC, DMA, memory, high-speed interfaces, and peripheral subsystems.
- Automation and infrastructure: Develop reliable emulation build flows, regressions, CI integration, and debugging automation.
- Integration and collaboration: Support third-party IP integration, maintain reproducible environments, and drive issues to resolution across engineering teams.
You'll Collaborate With SoC architects, RTL designers, Functional Verification engineers, Firmware and
Software teams, and EDA/CAD engineers to enable early system validation, improve emulation performance, and accelerate pre-silicon development.
Minimum Qualifications
- 7+ years of ASIC/SoC design, verification, or emulation experience, with substantial hands-on hardware emulation experience.
- Proven experience with commercial hardware emulation platforms such as Cadence Palladium, Synopsys ZeBu, or Siemens Veloce.
- Demonstrated ownership of subsystem or full-SoC emulation bring-up, from RTL compilation and mapping to execution and debugging.
- Strong knowledge of Verilog/SystemVerilog, SoC architecture, and AMB protocols (AXI/APB).
- Experience with emulation-compatible test environments, BFMs, transactors, and system-level debugging.
- Good understanding of CPU subsystems, NoC/interconnect, DMA, memory systems, clocks, resets, and interrupts.
- Proficiency in C/C++, Python, Tcl/Bash, Linux, and automation workflows.
- Experience supporting firmware-driven verification and hardware/software integration.
Preferred (Nice-to-Haves)
- Experience with UVM acceleration, SCE-MI, DPI-C, and transaction-based emulation.
- Experience with RISC-V/ARM processors, JTAG, boot flows, and embedded firmware.
- Exposure to AI accelerators, HPC SoCs, PCIe, Ethernet, CXL, UCIe, or advanced memory architectures.
- Experience with FPGA prototyping, virtual platforms, or hybrid simulation/emulation environments.
- Experience with multi-die SoCs, low-power validation, or post-silicon bring-up.